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CODES
2003
IEEE
15 years 8 months ago
Design space minimization with timing and code size optimization for embedded DSP
One of the most challenging problems in high-level synthesis is how to quickly explore a wide range of design options to achieve high-quality designs. This paper presents an Integ...
Qingfeng Zhuge, Zili Shao, Bin Xiao, Edwin Hsing-M...
122
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GLVLSI
2003
IEEE
130views VLSI» more  GLVLSI 2003»
15 years 8 months ago
Zero overhead watermarking technique for FPGA designs
FPGAs, because of their re-programmability, are becoming very popular for creating and exchanging VLSI intellectual properties (IPs) in the reuse-based design paradigm. Existing w...
Adarsh K. Jain, Lin Yuan, Pushkin R. Pari, Gang Qu
155
Voted
GLVLSI
2003
IEEE
146views VLSI» more  GLVLSI 2003»
15 years 8 months ago
A practical CAD technique for reducing power/ground noise in DSM circuits
One of the fundamental problems in Deep Sub Micron (DSM) circuits is Simultaneous Switching Noise (SSN), which causes voltage fluctuations in the circuit power/ground networks. In...
Arindam Mukherjee, Krishna Reddy Dusety, Rajsaktis...
135
Voted
HICSS
2003
IEEE
148views Biometrics» more  HICSS 2003»
15 years 8 months ago
Managing Multimedia Traffic in IP Integrated over Differentiated Services: SIP dynamic signaling inter-working
The current IETF standardization work has highlighted the feasibility of providing the users with a QoS network architecture in the framework of Integrated Services over Different...
Stefano Giordano, M. Mancino, A. Martucci, Saverio...
ICDCS
2003
IEEE
15 years 8 months ago
Effective Delay Control for High Rate Heterogeneous Real-time Flows
This paper presents a new method to control the delay performance for high rate heterogeneous real-time traffic flows based on a novel traffic control algorithm which is a gene...
Weijia Jia, Hanxing Wang, Maoning Tang, Wei Zhao
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