One of the most challenging problems in high-level synthesis is how to quickly explore a wide range of design options to achieve high-quality designs. This paper presents an Integ...
Qingfeng Zhuge, Zili Shao, Bin Xiao, Edwin Hsing-M...
FPGAs, because of their re-programmability, are becoming very popular for creating and exchanging VLSI intellectual properties (IPs) in the reuse-based design paradigm. Existing w...
Adarsh K. Jain, Lin Yuan, Pushkin R. Pari, Gang Qu
One of the fundamental problems in Deep Sub Micron (DSM) circuits is Simultaneous Switching Noise (SSN), which causes voltage fluctuations in the circuit power/ground networks. In...
The current IETF standardization work has highlighted the feasibility of providing the users with a QoS network architecture in the framework of Integrated Services over Different...
Stefano Giordano, M. Mancino, A. Martucci, Saverio...
This paper presents a new method to control the delay performance for high rate heterogeneous real-time traffic flows based on a novel traffic control algorithm which is a gene...