Although the notion of generality is central in mathematics and science, being able to identify and express general patterns and/or articulating structures is one of the main difď...
Abstract—To deal with the “memory wall” problem, microprocessors include large secondary on-chip caches. But as these caches enlarge, they originate a new latency gap between...
Navigation through large multimedia collections that include videos and images still remains a hard problem. In this paper, we introduce a novel method to visualize and navigate t...
This paper investigates the suitability of emerging tiled-architectures, equipped with low-latency on-chip networks, for high-performance network routing. In this paper, we presen...
Umar Saif, James W. Anderson, Anthony Degangi, Ana...
This paper explores the power implications of replacing global chip wires with an on-chip network. We optimize network links by varying repeater spacing, link pipelining, and volt...