3131 search results - page 139 / 627 » Generalized connection caching |
106
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LCTRTS
2007
Springer
15 years 6 months ago
2007
Springer
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
92
Voted
IEEEPACT
2006
IEEE
15 years 6 months ago
2006
IEEE
Modern out-of-order processors with non-blocking caches exploit Memory-Level Parallelism (MLP) by overlapping cache misses in a wide instruction window. The exploitation of MLP, h...
116
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CASES
2006
ACM
15 years 6 months ago
2006
ACM
Previous object code compression schemes have employed static and semiadaptive compression algorithms to reduce the size of instruction memory in embedded systems. The suggestion ...
111
Voted
ISCA
1996
IEEE
15 years 4 months ago
1996
IEEE
This paper makes the case that pin bandwidth will be a critical consideration for future microprocessors. We show that many of the techniques used to tolerate growing memory laten...
105
Voted
CN
2006
15 years 20 days ago
2006
In this paper, we present a novel approach to exploit the relationships among domain names to improve the cache hit rate for a local DNS server. Using these relationships, an auth...