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ISCA
1996
IEEE
130views Hardware» more  ISCA 1996»
15 years 4 months ago
Informing Memory Operations: Providing Memory Performance Feedback in Modern Processors
Memory latency is an important bottleneck in system performance that cannot be adequately solved by hardware alone. Several promising software techniques have been shown to addres...
Mark Horowitz, Margaret Martonosi, Todd C. Mowry, ...
82
Voted
DAC
2004
ACM
16 years 1 months ago
Multi-profile based code compression
Code compression has been shown to be an effective technique to reduce code size in memory constrained embedded systems. It has also been used as a way to increase cache hit ratio...
Eduardo Wanderley Netto, Rodolfo Azevedo, Paulo Ce...
SIGMOD
2006
ACM
214views Database» more  SIGMOD 2006»
16 years 25 days ago
aAqua: a database-backended multilingual, multimedia community forum
aAQUA is an online multilingual, multimedia Agricultural portal for disseminating information from and to rural communities. It answers farmers' queries based on the location...
Krithi Ramamritham, Anil Bahuman, Subhasri Duttagu...
JCDL
2009
ACM
102views Education» more  JCDL 2009»
15 years 7 months ago
Unsupervised creation of small world networks for the preservation of digital objects
The prevailing model for digital preservation is that archives should be similar to a “fortress”: a large, protective infrastructure built to defend a relatively small collect...
Charles L. Cartledge, Michael L. Nelson
105
Voted
IEEEPACT
2006
IEEE
15 years 6 months ago
Whole-program optimization of global variable layout
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...
Nathaniel McIntosh, Sandya Mannarswamy, Robert Hun...