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» Generalizing parametric timing analysis
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125
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ICCAD
2009
IEEE
132views Hardware» more  ICCAD 2009»
15 years 1 months ago
DynaTune: Circuit-level optimization for timing speculation considering dynamic path behavior
Traditional circuit design focuses on optimizing the static critical paths no matter how infrequently these paths are exercised dynamically. Circuit optimization is then tuned to ...
Lu Wan, Deming Chen
132
Voted
NIPS
2004
15 years 5 months ago
Efficient Kernel Discriminant Analysis via QR Decomposition
Linear Discriminant Analysis (LDA) is a well-known method for feature extraction and dimension reduction. It has been used widely in many applications such as face recognition. Re...
Tao Xiong, Jieping Ye, Qi Li, Ravi Janardan, Vladi...
114
Voted
ICPP
1993
IEEE
15 years 7 months ago
Dependence Analysis and Architecture Design for Bit-Level Algorithms
:. In designing application-specific bit-level architectures and in programming existing bit-level processor arrays, it is necessary to expand a word-level algorithm into its bit-...
Weijia Shang, Benjamin W. Wah
127
Voted
ISPD
2003
ACM
133views Hardware» more  ISPD 2003»
15 years 9 months ago
Optimal minimum-delay/area zero-skew clock tree wire-sizing in pseudo-polynomial time
In 21st-Century VLSI design, clocking plays crucial roles for both performance and timing convergence. Due to their non-convex nature, optimal minimum-delay/area zero-skew wire-si...
Jeng-Liang Tsai, Tsung-Hao Chen, Charlie Chung-Pin...
121
Voted
ECRTS
2003
IEEE
15 years 9 months ago
Using Supertasks to Improve Processor Utilization in Multiprocessor Real-Time Systems
We revisit the problem of supertasking in Pfair-scheduled multiprocessor systems. In this approach, a set of tasks, called component tasks, is assigned to a server task, called a ...
Philip Holman, James H. Anderson