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» Generalizing parametric timing analysis
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VLSID
2009
IEEE
155views VLSI» more  VLSID 2009»
16 years 4 months ago
Unified Challenges in Nano-CMOS High-Level Synthesis
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
Saraju P. Mohanty
121
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ICCAD
2003
IEEE
145views Hardware» more  ICCAD 2003»
16 years 10 days ago
Manufacturing-Aware Physical Design
Ultra-deep submicron manufacturability impacts physical design (PD) through complex layout rules and large guardbands for process variability; this creates new requirements for ne...
Puneet Gupta, Andrew B. Kahng
199
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VLDB
2007
ACM
103views Database» more  VLDB 2007»
16 years 3 months ago
On the Production of Anorexic Plan Diagrams
A "plan diagram" is a pictorial enumeration of the execution plan choices of a database query optimizer over the relational selectivity space. We have shown recently tha...
Harish D., Pooja N. Darera, Jayant R. Haritsa
GECCO
2007
Springer
200views Optimization» more  GECCO 2007»
15 years 9 months ago
Adaptive variance scaling in continuous multi-objective estimation-of-distribution algorithms
Recent research into single–objective continuous Estimation– of–Distribution Algorithms (EDAs) has shown that when maximum–likelihood estimations are used for parametric d...
Peter A. N. Bosman, Dirk Thierens
ASAP
2003
IEEE
133views Hardware» more  ASAP 2003»
15 years 8 months ago
Storage Management in Process Networks using the Lexicographically Maximal Preimage
At the Leiden Embedded Research Center, we are developing a compiler called Compaan that automatically translates signal processing applications written in Matlab into Kahn Proces...
Alexandru Turjan, Bart Kienhuis