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TCAD
2002
93views more  TCAD 2002»
15 years 4 months ago
Hierarchical buffered routing tree generation
Abstract--This paper presents a solution to the problem of performance-driven buffered routing tree generation for VLSI circuits. Using a novel bottom-up construction algorithm and...
Amir H. Salek, Jinan Lou, Massoud Pedram
140
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TCAD
2002
106views more  TCAD 2002»
15 years 4 months ago
Design of hierarchical cellular automata for on-chip test pattern generator
This paper introduces the concept of hierarchical cellular automata (HCA). The theory of HCA is developed over the Galois extension field (2 ), where each cell of the CA can store ...
Biplab K. Sikdar, Niloy Ganguly, Parimal Pal Chaud...
168
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VLSISP
2002
98views more  VLSISP 2002»
15 years 4 months ago
VLSI Implementation of the Multistage Detector for Next Generation Wideband CDMA Receivers
The multistage detection algorithm has been proposed as an effective interference cancellation scheme for next generation Wideband Code Division Multiple Access (W-CDMA) base stati...
Gang Xu, Sridhar Rajagopal, Joseph R. Cavallaro, B...
MJ
2007
86views more  MJ 2007»
15 years 4 months ago
Design, fabrication and performance of a new vibration-based electromagnetic micro power generator
This paper presents a new vibration-based electromagnetic micro power generator fabricated using microelectromechanical systems (MEMS) technology, which can convert ambient vibrat...
Pei-Hong Wang, Xu-Han Dai, Dong-Ming Fang, Xiao-Li...
136
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ATMOS
2010
150views Optimization» more  ATMOS 2010»
15 years 3 months ago
Dynamic Graph Generation and Dynamic Rolling Horizon Techniques in Large Scale Train Timetabling
The aim of the train timetabling problem is to find a conflict free timetable for a set of passenger and freight trains along their routes in an infrastructure network. Several ...
Frank Fischer, Christoph Helmberg