1188 search results - page 110 / 238 » Generating Connectives |
93
Voted
IFIP
1999
Springer
15 years 7 months ago
1999
Springer
: This paper presents a synthesis algorithm for pipelined circuits. The circuit is specified as a collection of independent, looselycoupled modules connected by queues. The synthe...
136
Voted
EUROMICRO
1998
IEEE
15 years 7 months ago
1998
IEEE
The paper presents an approach to process scheduling for embedded systems. Target architectures consist of several processors and ASICs connected by shared busses. We have develop...
119
Voted
ICPP
1998
IEEE
15 years 7 months ago
1998
IEEE
The crew planning problem has been successfully solved on a loosely connected network of workstations (NOW) using advanced computational techniques and efficient communication pat...
96
Voted
ICCAD
1997
IEEE
15 years 7 months ago
1997
IEEE
— This paper describes an algorithm for generating provably passive reduced-order N-port models for RLC interconnect circuits. It is demonstrated that, in addition to macromodel ...
ICCAD
1996
IEEE
15 years 7 months ago
1996
IEEE
We describe an algorithm for the synthesis and optimization of interface circuits for embedded system components such as microprocessors, memory ASIC, and network subsystems with ...