Sciweavers

5 search results - page 1 / 1
» Generating FPGA-Accelerated DFT Libraries
Sort
View
73
Voted
FCCM
2007
IEEE
115views VLSI» more  FCCM 2007»
15 years 3 months ago
Generating FPGA-Accelerated DFT Libraries
We present a domain-specific approach to generate highperformance hardware-software partitioned implementations of the discrete Fourier transform (DFT) in fixed point precision....
Paolo D'Alberto, Peter A. Milder, Aliaksei Sandryh...
VTS
1997
IEEE
105views Hardware» more  VTS 1997»
15 years 1 months ago
Critical hazard free test generation for asynchronous circuits
We describe a technique to generate critical hazard-free tests for self-timed control circuits build using a macromodule library, in a partial scan based DFT environment. Wepropos...
Ajay Khoche, Erik Brunvand
DAC
2005
ACM
15 years 10 months ago
Automatic generation of customized discrete fourier transform IPs
This paper presents a parameterized soft core generator for the discrete Fourier transform (DFT). Reusable IPs of digital signal processing (DSP) kernels are important time-saving...
Grace Nordin, Peter A. Milder, James C. Hoe, Marku...
IPPS
2003
IEEE
15 years 2 months ago
Short Vector Code Generation for the Discrete Fourier Transform
In this paper we use a mathematical approach to automatically generate high performance short vector code for the discrete Fourier transform (DFT). We represent the well-known Coo...
Franz Franchetti, Markus Püschel
HIPEAC
2007
Springer
15 years 3 months ago
Performance/Energy Optimization of DSP Transforms on the XScale Processor
The XScale processor family provides user-controllable independent configuration of CPU, bus, and memory frequencies. This feature introduces another handle for the code optimizat...
Paolo D'Alberto, Markus Püschel, Franz Franch...