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DATE
2004
IEEE
146views Hardware» more  DATE 2004»
15 years 1 months ago
Analyzing On-Chip Communication in a MPSoC Environment
This work focuses on communication architecture analysis for multi-processor Systems-on-Chips (MPSoCs), and it leverages a SystemC-based platform to simulate a complete multi-proc...
Mirko Loghi, Federico Angiolini, Davide Bertozzi, ...
TVLSI
2002
121views more  TVLSI 2002»
14 years 9 months ago
On-chip decoupling capacitor optimization using architectural level prediction
Switching activity-generated power-supply grid-noise presents a major obstacle to the reduction of supply voltage in future generation semiconductor technologies. A popular techniq...
Mondira Deb Pant, Pankaj Pant, D. Scott Wills
CNSM
2010
14 years 4 months ago
Capacity planning and power management to exploit sustainable energy
This paper describes an approach for designing a power management plan that matches the supply of power with the demand for power in data centers. Power may come from the grid, fro...
Daniel Gmach, Jerry Rolia, Cullen Bash, Yuan Chen,...
115
Voted
SIGIR
1996
ACM
15 years 1 months ago
Performance Evaluation of a Distributed Architecture for Information Retrieval
Information explosion across the Internet and elsewhere offers access to an increasing number of document collections. In order for users to e ectively access these collections, i...
Brendon Cahoon, Kathryn S. McKinley
CONCUR
2007
Springer
15 years 3 months ago
Causal Message Sequence Charts
Scenario languages based on Message Sequence Charts (MSCs) have been widely studied in the last decade [21,20,3,15,12,19,14]. The high expressive power of MSCs renders many basic ...
Thomas Gazagnaire, Blaise Genest, Loïc H&eacu...