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ITC
1997
IEEE
73views Hardware» more  ITC 1997»
15 years 1 months ago
A Low-Overhead Design for Testability and Test Generation Technique for Core-Based Systems
In a fundamental paradigm shift in system design, entire systems are being built on a single chip, using multiple embedded cores. Though the newest system design methodology has s...
Indradeep Ghosh, Niraj K. Jha, Sujit Dey
DATE
2006
IEEE
82views Hardware» more  DATE 2006»
15 years 3 months ago
Concurrent core test for SOC using shared test set and scan chain disable
A concurrent core test approach is proposed to reduce the test cost of SOC. Multiple cores in SOC can be tested simultaneously by using a shared test set and scan chain disable. P...
Gang Zeng, Hideo Ito
GPCE
2003
Springer
15 years 2 months ago
A Case for Test-Code Generation in Model-Driven Systems
A primary goal of generative programming and model-driven ent is to raise the level of abstraction at which designers and developers interact with the software systems they are bui...
Matthew J. Rutherford, Alexander L. Wolf
COMSWARE
2008
IEEE
15 years 4 months ago
A reality check on sip-based streaming applications on the next generation mobile test network
— The telecom and the internet world is converging towards all-IP network architecture and the operators are keen to provide innovative multimedia services coupled with advanced ...
Chitra Balakrishna, Khalid Al-Begain
DATE
2007
IEEE
155views Hardware» more  DATE 2007»
15 years 4 months ago
Design fault directed test generation for microprocessor validation
Functional validation of modern microprocessors is an important and complex problem. One of the problems in functional validation is the generation of test cases that has higher p...
Deepak Mathaikutty, Sandeep K. Shukla, Sreekumar V...