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» Generating Trees on Multisets
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PARELEC
2002
IEEE
15 years 3 months ago
Dynamic Process Partitioning and Migration for Irregular Applications
Many practical applications generate irregular, nonbalanced divide-and-conquer trees which have different depths, possibly also different numbers of successors at different levels...
Pawel Czarnul
SIGMOD
2010
ACM
239views Database» more  SIGMOD 2010»
15 years 3 months ago
Computing label-constraint reachability in graph databases
Our world today is generating huge amounts of graph data such as social networks, biological networks, and the semantic web. Many of these real-world graphs are edge-labeled graph...
Ruoming Jin, Hui Hong, Haixun Wang, Ning Ruan, Yan...
FCCM
1999
IEEE
111views VLSI» more  FCCM 1999»
15 years 2 months ago
Optimizing FPGA-Based Vector Product Designs
This paper presents a method, called multiple constant multiplier trees MCMTs, for producing optimized recon gurable hardware implementations of vector products. An algorithm for ...
Dan Benyamin, John D. Villasenor, Wayne Luk
90
Voted
FPGA
1999
ACM
142views FPGA» more  FPGA 1999»
15 years 2 months ago
Multi-Terminal Net Routing for Partial Crossbar-Based Multi-FPGA Systems
Multi-FPGA systems are used as custom computing machines to solve compute intensive problems and also in the verification and prototyping of large circuits. In this paper, we addr...
Abdel Ejnioui, N. Ranganathan
ICCAD
1997
IEEE
97views Hardware» more  ICCAD 1997»
15 years 2 months ago
Low power logic synthesis for XOR based circuits
An abundance of research e orts in low power logic synthesis have so far been focused on and or or nand nor based logic. A typical approach is to rst generate an initial multi-lev...
Unni Narayanan, C. L. Liu