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» Generating VHDL models from natural language descriptions
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ACSC
2003
IEEE
13 years 11 months ago
Using Natural Language Generation for Navigational Assistance
In this paper we tackle the problem of generating natural route descriptions on the basis of input obtained from a commercially available way-finding system. Our framework and ar...
Robert Dale, Sabine Geldof, Jean-Philippe Prost
SAFECOMP
2000
Springer
13 years 9 months ago
Speeding-Up Fault Injection Campaigns in VHDL Models
Abstract. Simulation-based Fault Injection in VHDL descriptions is increasingly common due to the popularity of top-down design flows exploiting this language. This paper presents ...
B. Parrotta, Maurizio Rebaudengo, Matteo Sonza Reo...
FDL
2007
IEEE
13 years 10 months ago
A Metamodeling based Framework for Architectural Modeling and Simulator Generation
Functional validation of microprocessors is growing in complexity in current and future microprocessors. The informal specification document from which the various collaterals are ...
Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shu...