438 search results - page 2 / 88 » Generating VHDL models from natural language descriptions |
EMNLP
2011
13 years 11 months ago
2011
EMNLP
2011
13 years 11 months ago
2011
79
Voted
ACSC
2003
IEEE
15 years 5 months ago
2003
IEEE
In this paper we tackle the problem of generating natural route descriptions on the basis of input obtained from a commercially available way-finding system. Our framework and ar...
SAFECOMP
2000
Springer
15 years 3 months ago
2000
Springer
Abstract. Simulation-based Fault Injection in VHDL descriptions is increasingly common due to the popularity of top-down design flows exploiting this language. This paper presents ...
FDL
2007
IEEE
15 years 3 months ago
2007
IEEE
Functional validation of microprocessors is growing in complexity in current and future microprocessors. The informal specification document from which the various collaterals are ...