1140 search results - page 148 / 228 » Generating compilers for generated datapaths |
123
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DATE
2007
IEEE
15 years 9 months ago
2007
IEEE
Loop unrolling is a well-known compiler optimization that can lead to significant performance improvements. When used in High Level Synthesis (HLS) unrolling can affect the contr...
105
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ASPDAC
2006
ACM
15 years 9 months ago
2006
ACM
— This paper shows a new type of a cycle-based logic simulation method using a Look-Up Table (LUT) cascade emulator. The method first transforms a given circuit into LUT cascade...
135
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VL
2005
IEEE
15 years 8 months ago
2005
IEEE
Abstract— Visualizing software architecture faces the challenges of both data complexity and visual complexity. This paper presents an approach for visualizing software architect...
158
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CMMR
2005
Springer
15 years 8 months ago
2005
Springer
The pureCMusic (pCM++) framework gives the possibility to write a piece of music in terms of an algorithmic-composition-based program -also controlled by data streaming from extern...
140
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EUROPAR
2005
Springer
15 years 8 months ago
2005
Springer
Abstract. Understanding and controlling program behavior is a challenging objective for the design of advanced compilers and critical system development. In this paper, we propose ...