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» Generating compilers for generated datapaths
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CASES
2003
ACM
15 years 5 months ago
Extending STI for demanding hard-real-time systems
Software thread integration (STI) is a compilation technique which enables the efficient use of an application’s fine-grain idle time on generic processors without special hardw...
Benjamin J. Welch, Shobhit O. Kanaujia, Adarsh See...
IEEEPACT
2002
IEEE
15 years 4 months ago
Optimizing Loop Performance for Clustered VLIW Architectures
Modern embedded systems often require high degrees of instruction-level parallelism (ILP) within strict constraints on power consumption and chip cost. Unfortunately, a high-perfo...
Yi Qian, Steve Carr, Philip H. Sweany
110
Voted
IWMM
2010
Springer
118views Hardware» more  IWMM 2010»
15 years 4 months ago
Speculative parallelization using state separation and multiple value prediction
With the availability of chip multiprocessor (CMP) and simultaneous multithreading (SMT) machines, extracting thread level parallelism from a sequential program has become crucial...
Chen Tian, Min Feng, Rajiv Gupta
104
Voted
HPCC
2009
Springer
15 years 4 months ago
On Instruction-Level Method for Reducing Cache Penalties in Embedded VLIW Processors
Usual cache optimisation techniques for high performance computing are difficult to apply in embedded VLIW applications. First, embedded applications are not always well structur...
Samir Ammenouche, Sid Ahmed Ali Touati, William Ja...
90
Voted
LCPC
2009
Springer
15 years 4 months ago
Speculative Optimizations for Parallel Programs on Multicores
The advent of multicores presents a promising opportunity for exploiting fine grained parallelism present in programs. Programs parallelized in the above fashion, typically involv...
Vijay Nagarajan, Rajiv Gupta