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» Generating compilers for generated datapaths
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126
Voted
IPPS
2010
IEEE
15 years 20 days ago
DynTile: Parametric tiled loop generation for parallel execution on multicore processors
Abstract--Loop tiling is an important compiler transformation used for enhancing data locality and exploiting coarsegrained parallelism. Tiled codes in which tile sizes are runtime...
Albert Hartono, Muthu Manikandan Baskaran, J. Rama...
137
Voted
ISCAS
1999
IEEE
132views Hardware» more  ISCAS 1999»
15 years 7 months ago
Dynamic trellis diagrams for optimized DSP code generation
In this paper, we present the application of dynamic trellis diagrams (DTDs) to automatic translation of data flow graphs (DFGs) into highly optimized programs for digital signal ...
Stefan Fröhlich, Martin Gotschlich, Udo Krebe...
125
Voted
DATE
2003
IEEE
124views Hardware» more  DATE 2003»
15 years 8 months ago
A Custom-Cell Identification Method for High-Performance Mixed Standard/Custom-Cell Designs
: Over the years, many design methodologies/tools and layout architectures have been developed for datapath-oriented designs. One commonly used approach for high-speed datapath des...
Jennifer Y.-L. Lo, Wu-An Kuo, Allen C.-H. Wu, Ting...
93
Voted
MICRO
2009
IEEE
113views Hardware» more  MICRO 2009»
15 years 9 months ago
Portable compiler optimisation across embedded programs and microarchitectures using machine learning
Building an optimising compiler is a difficult and time consuming task which must be repeated for each generation of a microprocessor. As the underlying microarchitecture changes...
Christophe Dubach, Timothy M. Jones, Edwin V. Boni...
102
Voted
LCPC
2001
Springer
15 years 7 months ago
The Structure of a Compiler for Explicit and Implicit Parallelism
Abstract. We describe the structure of a compilation system that generates code for processor architectures supporting both explicit and implicit parallel threads. Such architectur...
Seon Wook Kim, Rudolf Eigenmann