1140 search results - page 6 / 228 » Generating compilers for generated datapaths |
145
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ICCAD
2001
IEEE
16 years 1 months ago
2001
IEEE
In this paper we describe a software pipelining framework, CALiBeR (Cluster Aware Load Balancing Retiming Algorithm), suitable for compilers targeting clustered embedded VLIW proc...
128
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CGO
2007
IEEE
15 years 11 months ago
2007
IEEE
The demand for high performance has driven acyclic computation accelerators into extensive use in modern embedded and desktop architectures. Accelerators that are ideal from a sof...
173
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ICCTA
2007
IEEE
15 years 8 months ago
2007
IEEE
The variables of the high-level specifications and the automatically generated temporary variables are mapped on to the data-path registers during data-path synthesis phase of hig...
149
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DATE
1999
IEEE
15 years 9 months ago
1999
IEEE
A novel approach to testing sequential circuits that uses multi-level decision diagram representations is introduced. The proposed algorithm consists of a combination of scanning ...
123
Voted
ISCAS
1995
IEEE
15 years 8 months ago
1995
IEEE
: Configurations of adders and registers, which are available in tnany datapaths, can be utilized to generate pattems and to compact test responses. Thispaper unalyzes tlie patiern...