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» Generating compilers for generated datapaths
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CODES
1996
IEEE
15 years 7 months ago
A Multi-Level Transformation Approach to HW/SW Codesign: A Case Study
This reported work applies a transformational synthesis approach to hardware/software codesign. In this approach, the process of algorithm design is coupled early on with hardware...
Tommy King-Yin Cheung, Graham R. Hellestrand, Pras...
ICCAD
2007
IEEE
151views Hardware» more  ICCAD 2007»
15 years 7 months ago
A design flow dedicated to multi-mode architectures for DSP applications
This paper addresses the design of multi-mode architectures for digital signal processing applications. We present a dedicated design flow and its associated high-level synthesis t...
Cyrille Chavet, Caaliph Andriamisaina, Philippe Co...
VLSISP
1998
128views more  VLSISP 1998»
15 years 2 months ago
A Low Power DSP Engine for Wireless Communications
This paper describes the architecture and the performance of a new programmable 16-bit Digital Signal Processor (DSP) engine. It is developed specifically for next generation wire...
Ingrid Verbauwhede, Mihran Touriguian
ASAP
2010
IEEE
315views Hardware» more  ASAP 2010»
15 years 1 months ago
A compact FPGA-based architecture for elliptic curve cryptography over prime fields
Abstract--This paper proposes an FPGA-based applicationspecific elliptic curve processor over a prime field. This research targets applications for which compactness is more import...
Jo Vliegen, Nele Mentens, Jan Genoe, An Braeken, S...
ICCAD
2009
IEEE
118views Hardware» more  ICCAD 2009»
15 years 1 months ago
Memory organization and data layout for instruction set extensions with architecturally visible storage
Present application specific embedded systems tend to choose instruction set extensions (ISEs) based on limitations imposed by the available data bandwidth to custom functional un...
Panagiotis Athanasopoulos, Philip Brisk, Yusuf Leb...