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ISCA
2002
IEEE
104views Hardware» more  ISCA 2002»
14 years 9 months ago
Speculative Dynamic Vectorization
Traditional vector architectures have shown to be very effective for regular codes where the compiler can detect data-level parallelism. However, this SIMD parallelism is also pre...
Alex Pajuelo, Antonio González, Mateo Valer...
ICRA
2010
IEEE
134views Robotics» more  ICRA 2010»
14 years 8 months ago
Understanding and executing instructions for everyday manipulation tasks from the World Wide Web
Service robots will have to accomplish more and more complex, open-ended tasks and regularly acquire new skills. In this work, we propose a new approach to generating plans for su...
Moritz Tenorth, Daniel Nyga, Michael Beetz
CODES
2001
IEEE
15 years 1 months ago
Evaluating register file size in ASIP design
Interest in synthesis of Application Specific Instruction Set Processors or ASIPs has increased considerably and a number of methodologies have been proposed for ASIP design. A ke...
Manoj Kumar Jain, Lars Wehmeyer, Stefan Steinke, P...
ASPLOS
2012
ACM
13 years 5 months ago
Architecture support for disciplined approximate programming
Disciplined approximate programming lets programmers declare which parts of a program can be computed approximately and consequently at a lower energy cost. The compiler proves st...
Hadi Esmaeilzadeh, Adrian Sampson, Luis Ceze, Doug...
RTSS
2006
IEEE
15 years 3 months ago
MCGREP - A Predictable Architecture for Embedded Real-Time Systems
Real-time systems design involves many important choices, including that of the processor. The fastest processors achieve performance by utilizing architectural features that make...
Jack Whitham, Neil C. Audsley