19 search results - page 4 / 4 » Generating low-overhead dynamic binary translators |
73
Voted
ERSA
2009
14 years 7 months ago
2009
In this paper, we introduce the Woolcano reconfigurable processor architecture. The architecture is based on the Xilinx Virtex-4 FX FPGA and leverages the Auxiliary Processing Uni...
85
Voted
CASES
2008
ACM
14 years 11 months ago
2008
ACM
Dynamic binary translators (DBT) have recently attracted much attention for embedded systems. The effective implementation of DBT in these systems is challenging due to tight cons...
DATE
2006
IEEE
15 years 3 months ago
2006
IEEE
Instruction set simulators are common tools used for the development of new architectures and embedded software among countless other functions. This paper presents a framework th...
100
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ASPLOS
2000
ACM
15 years 1 months ago
2000
ACM
Recently, there has been a growing interest in exploiting profile information in adaptive systems such as just-in-time compilers, dynamic optimizers and, binary translators. In th...