185 search results - page 17 / 37 » Generation of Interpretive and Compiled Instruction Set Simu... |
76
Voted
SAMOS
2005
Springer
15 years 5 months ago
2005
Springer
—We describe the generation of the simulation environment for the Sandbridge Sandblaster multithreaded processor. The processor model is described using the Sandblaster architect...
109
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RTSS
2006
IEEE
15 years 5 months ago
2006
IEEE
Real-time systems design involves many important choices, including that of the processor. The fastest processors achieve performance by utilizing architectural features that make...
109
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LCTRTS
2009
Springer
15 years 6 months ago
2009
Springer
Dynamic binary translation (DBT) can provide security, virtualization, resource management and other desirable services to embedded systems. Although DBT has many benefits, its r...
101
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MASCOTS
2010
15 years 1 months ago
2010
Abstract--We present Barra, a simulator of Graphics Processing Units (GPU) tuned for general purpose processing (GPGPU). It is based on the UNISIM framework and it simulates the na...
88
Voted
DAC
2004
ACM
16 years 18 days ago
2004
ACM
Architecture description languages (ADL) have been established to aid the design of application-specific instruction-set processors (ASIP). Their main contribution is the automati...