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IACR
2011
115views more  IACR 2011»
13 years 11 months ago
Multi-Server Oblivious RAM
Secure two-party computation protocol allows two players, Alice with secret input x and Bob with secret input y, to jointly execute an arbitrary program π(x, y) such that only th...
Steve Lu, Rafail Ostrovsky
MICRO
2006
IEEE
132views Hardware» more  MICRO 2006»
15 years 5 months ago
Data-Dependency Graph Transformations for Superblock Scheduling
The superblock is a scheduling region which exposes instruction level parallelism beyond the basic block through speculative execution of instructions. In general, scheduling supe...
Mark Heffernan, Kent D. Wilken, Ghassan Shobaki
TJS
2002
135views more  TJS 2002»
14 years 11 months ago
HPCVIEW: A Tool for Top-down Analysis of Node Performance
Although it is increasingly difficult for large scientific programs to attain a significant fraction of peak performance on systems based on microprocessors with substantial instr...
John M. Mellor-Crummey, Robert J. Fowler, Gabriel ...
CASES
2005
ACM
15 years 1 months ago
Software-directed power-aware interconnection networks
Interconnection networks have been deployed as the communication fabric in a wide range of parallel computer systems. With recent technological trends allowing growing quantities ...
Vassos Soteriou, Noel Eisley, Li-Shiuan Peh
CASES
2005
ACM
15 years 1 months ago
An Esterel processor with full preemption support and its worst case reaction time analysis
The concurrent synchronous language Esterel allows proto treat reactive systems in an abstract, concise manner. An Esterel program is typically first translated into other, non-s...
Xin Li, Jan Lukoschus, Marian Boldt, Michael Harde...