185 search results - page 9 / 37 » Generation of Interpretive and Compiled Instruction Set Simu... |
ERSA
2009
14 years 9 months ago
2009
In this paper, we introduce the Woolcano reconfigurable processor architecture. The architecture is based on the Xilinx Virtex-4 FX FPGA and leverages the Auxiliary Processing Uni...
JSA
2008
14 years 11 months ago
2008
Processor simulators are important parts of processor design toolsets in which they are used to verify and evaluate the properties of the designed processors. While simulating arch...
ICCAD
2005
IEEE
15 years 8 months ago
2005
IEEE
—Existing ASIPs (application-specific instruction-set processors) and compiler-based co-processor synthesis approaches meet the increasing performance requirements of embedded ap...
102
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CODES
1999
IEEE
15 years 3 months ago
1999
IEEE
This paper introduces a flexible code generation framework dedicated to the design of application specific programmable processors. This tool allows the user to build specific com...
119
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CODES
2009
IEEE
15 years 6 months ago
2009
IEEE
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...