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ICCAD
2000
IEEE
148views Hardware» more  ICCAD 2000»
15 years 5 months ago
FIR Filter Synthesis Algorithms for Minimizing the Delay and the Number of Adders
—As the complexity of digital filters is dominated by the number of multiplications, many works have focused on minimizing the complexity of multiplier blocks that compute the co...
Hyeong-Ju Kang, Hansoo Kim, In-Cheol Park
DATE
2004
IEEE
158views Hardware» more  DATE 2004»
15 years 4 months ago
Bandwidth-Constrained Mapping of Cores onto NoC Architectures
We address the design of complex monolithic systems, where processing cores generate and consume a varying and large amount of data, thus bringing the communication links to the e...
Srinivasan Murali, Giovanni De Micheli
CAV
2012
Springer
222views Hardware» more  CAV 2012»
13 years 3 months ago
Leveraging Interpolant Strength in Model Checking
Craig interpolation is a well known method of abstraction successfully used in both hardware and software model checking. The logical strength of interpolants can affect the quali...
Simone Fulvio Rollini, Ondrej Sery, Natasha Sharyg...
PVLDB
2010
151views more  PVLDB 2010»
14 years 11 months ago
Advanced Processing for Ontological Queries
Ontology-based data access is a powerful form of extending database technology, where a classical extensional database (EDB) is enhanced by an ontology that generates new intensio...
Andrea Calì, Georg Gottlob, Andreas Pieris
ICCAD
1999
IEEE
125views Hardware» more  ICCAD 1999»
15 years 5 months ago
Direct synthesis of timed asynchronous circuits
This paper presents a new method to synthesize timed asynchronous circuits directly from the specification without generating a state graph. The synthesis procedure begins with a ...
Sung Tae Jung, Chris J. Myers