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» Generation under Space Constraints
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POPL
2011
ACM
14 years 3 months ago
Decidable logics combining heap structures and data
We define a new logic, STRAND, that allows reasoning with heapmanipulating programs using deductive verification and SMT solvers. STRAND logic (“STRucture ANd Data” logic) f...
P. Madhusudan, Gennaro Parlato, Xiaokang Qiu
DAC
2006
ACM
16 years 1 months ago
Efficient SAT-based Boolean matching for FPGA technology mapping
Most FPGA technology mapping approaches either target Lookup Tables (LUTs) or relatively simple Programmable Logic Blocks (PLBs). Considering networks of PLBs during technology map...
Sean Safarpour, Andreas G. Veneris, Gregg Baeckler...
98
Voted
EMSOFT
2010
Springer
14 years 10 months ago
Reducing stack with intra-task threshold priorities in real-time systems
In the design of hard real-time systems, the feasibility of the task set is one of the primary concerns. However, in embedded systems with scarce resources, optimizing resource us...
Gang Yao, Giorgio C. Buttazzo
105
Voted
ICPP
2002
IEEE
15 years 5 months ago
Optimal Code Size Reduction for Software-Pipelined Loops on DSP Applications
Code size expansion of software-pipelined loops is a critical problem for DSP systems with strict code size constraint. Some ad-hoc code size reduction techniques were used to try...
Qingfeng Zhuge, Zili Shao, Edwin Hsing-Mean Sha
135
Voted
CASES
2007
ACM
15 years 4 months ago
Fragment cache management for dynamic binary translators in embedded systems with scratchpad
Dynamic binary translation (DBT) has been used to achieve numerous goals (e.g., better performance) for general-purpose computers. Recently, DBT has also attracted attention for e...
José Baiocchi, Bruce R. Childers, Jack W. D...