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ASPDAC
2004
ACM
110views Hardware» more  ASPDAC 2004»
15 years 3 months ago
Embedded software generation from system level design languages
Abstract— To meet the challenge of increasing design complexity, designers are turning to system level design languages to model systems at a higher level of abstraction. This pa...
Haobo Yu, Rainer Dömer, Daniel Gajski
FCCM
2002
IEEE
174views VLSI» more  FCCM 2002»
15 years 3 months ago
PAM-Blox II: Design and Evaluation of C++ Module Generation for Computing with FPGAs
This paper explores the implications of integrating flexible module generation into a compiler for FPGAs. The objective is to improve the programmabilityof FPGAs, or in other wor...
Oskar Mencer
GECCO
2005
Springer
156views Optimization» more  GECCO 2005»
15 years 3 months ago
Parameterized versus generative representations in structural design: an empirical comparison
Any computational approach to design, including the use of evolutionary algorithms, requires the transformation of the domain-specific knowledge into a formal design representatio...
Rafal Kicinger, Tomasz Arciszewski, Kenneth A. De ...
ISSS
2002
IEEE
142views Hardware» more  ISSS 2002»
15 years 3 months ago
Round-Robin Arbiter Design and Generation
In this paper, we introduce a Round–robin Arbiter Generator (RAG) tool. The RAG tool can generate a design for a Bus Arbiter (BA). The BA is able to handle the exact number of b...
Vincent John Mooney III, George F. Riley, Eung S. ...
DSD
2008
IEEE
115views Hardware» more  DSD 2008»
15 years 4 months ago
An Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA
We propose a method to efficiently design a “parity generator”, which is a stand-alone block producing multiple parity bits of a given circuit. The parity generator is designe...
Petr Fiser, Pavel Kubalík, Hana Kubatova