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DATE
2005
IEEE
115views Hardware» more  DATE 2005»
15 years 3 months ago
An Infrastructure to Functionally Test Designs Generated by Compilers Targeting FPGAs
This paper presents an infrastructure to test the functionality of the specific architectures output by a highlevel compiler targeting dynamically reconfigurable hardware. It resu...
Rui Rodrigues, João M. P. Cardoso
ICALT
2005
IEEE
15 years 3 months ago
Indigenous Multimedia Content Development for Next Generation Smart Schools: A Cognitive Instructional Design Approach
There is a need to look at indigenous digital multimedia educational content development approaches that would meet the needs of indigenous community. This poster hopes to highlig...
Halimah Badioze Zaman, Norhayati Abdul Mukti, Teng...
IISWC
2008
IEEE
15 years 4 months ago
A workload for evaluating deep packet inspection architectures
—High-speed content inspection of network traffic is an important new application area for programmable networking systems, and has recently led to several proposals for high-per...
Michela Becchi, Mark A. Franklin, Patrick Crowley
DSD
2007
IEEE
116views Hardware» more  DSD 2007»
15 years 4 months ago
Design Method for Numerical Function Generators Based on Polynomial Approximation for FPGA Implementation
This paper focuses on numerical function generators (NFGs) based on k-th order polynomial approximations. We show that increasing the polynomial order k reduces significantly the...
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
CORR
2010
Springer
92views Education» more  CORR 2010»
14 years 10 months ago
Design and Modeling Billing solution to Next Generation Networks
-------------------------------------------------------------------ABSTRACT----------------------------------------------------------------Next generation networks (NGN) services a...
Kamaljit I. Lakhtaria, N. N. Jani