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ASPDAC
2009
ACM
249views Hardware» more  ASPDAC 2009»
15 years 7 months ago
Automatic generation of Cycle Accurate and Cycle Count Accurate transaction level bus models from a formal model
— This paper proposes the first automatic approach to simultaneously generate Cycle Accurate and Cycle Count Accurate transaction level bus models. Since TLM (Transaction Level M...
Chen Kang Lo, Ren-Song Tsay
ICSE
2010
IEEE-ACM
15 years 7 months ago
Reverse engineering with the reclipse tool suite
Design pattern detection is a reverse engineering methodology that helps software engineers to analyze and understand legacy software by recovering its design and thereby aiding i...
Markus von Detten, Matthias Meyer, Dietrich Travki...
100
Voted
KBSE
2008
IEEE
15 years 9 months ago
Rhizome: A Feature Modeling and Generation Platform
Rhizome is an end-to-end feature modeling and code generation platform that includes a feature modeling language (FeatureML), a template language (MarkerML) and a template-based c...
Guozheng Ge, E. James Whitehead Jr.
110
Voted
CODES
2000
IEEE
15 years 7 months ago
Automatic test bench generation for simulation-based validation
In current design practice synthesis tools play a key role, letting designers to concentrate on the specificationof the system being designed by carrying out repetitive tasks such...
Marcello Lajolo, Luciano Lavagno, Maurizio Rebaude...
151
Voted
HOTNETS
2010
14 years 9 months ago
Next generation on-chip networks: what kind of congestion control do we need?
In this paper, we present network-on-chip (NoC) design and contrast it to traditional network design, highlighting core differences between NoCs and traditional networks. As an in...
George Nychis, Chris Fallin, Thomas Moscibroda, On...