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GLVLSI
2008
IEEE
120views VLSI» more  GLVLSI 2008»
15 years 11 months ago
SAT-based equivalence checking of threshold logic designs for nanotechnologies
Novel nano-scale devices have shown promising potential to overcome physical barriers faced by complementary metaloxide semiconductor (CMOS) technology in future circuit design. H...
Yexin Zheng, Michael S. Hsiao, Chao Huang
DSVIS
2005
Springer
15 years 10 months ago
Concept Analysis as a Formal Method for Menu Design
The design and construction of navigation menus for websites have traditionally been performed manually according to the intuition of a web developer. This paper introduces a new a...
Guo-Qiang Zhang, Gongqin Shen, Ye Tian, Jiayang Su...
VLSID
2004
IEEE
135views VLSI» more  VLSID 2004»
16 years 5 months ago
Integrating Self Testability with Design Space Exploration by a Controller based Estimation Technique
Recent research for testable designs has focussed on inserting test structures by re-arranging an Register-TransferLevel (RTL) data path generated from a behavioural description t...
M. S. Gaur, Mark Zwolinski
SASP
2008
IEEE
140views Hardware» more  SASP 2008»
15 years 11 months ago
An FPGA Design Space Exploration Tool for Matrix Inversion Architectures
— Matrix inversion is a common function found in many algorithms used in wireless communication systems. As FPGAs become an increasingly attractive platform for wireless communic...
Ali Irturk, Bridget Benson, Shahnam Mirzaei, Ryan ...
ISVLSI
2003
IEEE
103views VLSI» more  ISVLSI 2003»
15 years 10 months ago
Energy Recovering ASIC Design
Abstract— Dissipation in the clock tree and state elements of ASIC designs is often a significant fraction of total energy consumption. We propose a methodology for recovering m...
Conrad H. Ziesler, Joohee Kim, Marios C. Papaefthy...