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VTS
1998
IEEE
124views Hardware» more  VTS 1998»
15 years 2 months ago
A Test Pattern Generation Methodology for Low-Power Consumption
This paper proposes an ATPG technique that reduces power dissipation during the test of sequential circuits. The proposed approach exploits some redundancy introduced during the t...
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo,...
VTS
2002
IEEE
120views Hardware» more  VTS 2002»
15 years 2 months ago
Test Pattern Generation for Signal Integrity Faults on Long Interconnects
In this paper, we present a test pattern generation algorithm aiming at signal integrity faults on long interconnects. This is achieved by considering the effect of inputs and par...
Amir Attarha, Mehrdad Nourani
ICCAD
1991
IEEE
135views Hardware» more  ICCAD 1991»
15 years 1 months ago
DIATEST: A Fast Diagnostic Test Pattern Generator for Combinational Circuits
This paper presents an efficient algorithm for the generation of diagnostic test patterns which distinguish between two arbitrary single stuck-at faults. The algorithm is able to ...
Torsten Grüning, Udo Mahlstedt, Hartmut Koopm...
TC
2008
14 years 9 months ago
Low-Transition Test Pattern Generation for BIST-Based Applications
A low-transition test pattern generator, called the low-transition linear feedback shift register (LT-LFSR), is proposed to reduce the average and peak power of a circuit during te...
Mehrdad Nourani, Mohammad Tehranipoor, Nisar Ahmed
AAAI
2006
14 years 11 months ago
Minimum Description Length Principle: Generators Are Preferable to Closed Patterns
The generators and the unique closed pattern of an equivalence class of itemsets share a common set of transactions. The generators are the minimal ones among the equivalent items...
Jinyan Li, Haiquan Li, Limsoon Wong, Jian Pei, Guo...