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FPGA
2003
ACM
138views FPGA» more  FPGA 2003»
16 years 6 days ago
Automatic transistor and physical design of FPGA tiles from an architectural specification
One of the most difficult and time-consuming steps in the creation of an FPGA is its transistor-level design and physical layout. Modern commercial FPGAs typically consume anywher...
Ketan Padalia, Ryan Fung, Mark Bourgeault, Aaron E...
GECCO
2003
Springer
189views Optimization» more  GECCO 2003»
16 years 6 days ago
A Forest Representation for Evolutionary Algorithms Applied to Network Design
Abstract. Network design involves several areas of engineering and science. Computer networks, electrical circuits, transportation problems, and phylogenetic trees are some example...
Alexandre C. B. Delbem, André Carlos Ponce ...
ICST
2008
IEEE
16 years 1 months ago
Designing and Building a Software Test Organization
–Abstract for conference - preliminary Model-Based Testing: Models for Test Cases Jan Tretmans, Embedded Systems Institute, Eindhoven : Systematic testing of software plays an im...
Bruce Benton
KDD
2006
ACM
179views Data Mining» more  KDD 2006»
16 years 7 months ago
Extracting key-substring-group features for text classification
In many text classification applications, it is appealing to take every document as a string of characters rather than a bag of words. Previous research studies in this area mostl...
Dell Zhang, Wee Sun Lee
ICCAD
2005
IEEE
147views Hardware» more  ICCAD 2005»
16 years 3 months ago
NoCEE: energy macro-model extraction methodology for network on chip routers
In this paper we present NoCEE, a fast and accurate method for extracting energy models for packet-switched Network on Chip (NoC) routers. Linear regression is used to model the r...
Jeremy Chan, Sri Parameswaran