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FPL
2010
Springer
106views Hardware» more  FPL 2010»
15 years 5 months ago
Increasing Design Productivity through Core Reuse, Meta-data Encapsulation, and Synthesis
This paper presents a novel IP core reuse strategy which reduces design time from days to hours for communication circuits such as digital radio receivers. This design productivity...
Adam Arnesen, Kevin Ellsworth, Derrick Gibelyou, T...
ICCAD
2008
IEEE
107views Hardware» more  ICCAD 2008»
16 years 1 months ago
Importance sampled circuit learning ensembles for robust analog IC design
This paper presents ISCLEs, a novel and robust analog design method that promises to scale with Moore’s Law, by doing boosting-style importance sampling on digital-sized circuit...
Peng Gao, Trent McConaghy, Georges G. E. Gielen
ROBIO
2006
IEEE
130views Robotics» more  ROBIO 2006»
16 years 1 months ago
GA-Based Multi-Objective Optimal Design of a Planar 3-DOF Cable-Driven Parallel Manipulator
— The architecture optimization of a three degrees of freedom (3-DOF) planar cable-driven parallel manipulator (CDPM) with multiple objectives has been implemented by means of GA...
Yangmin Li, Qingsong Xu
HICSS
1999
IEEE
93views Biometrics» more  HICSS 1999»
15 years 11 months ago
The Design of a Letter-Mail Transportation Network by Intelligent Techniques
Many transportation providers such as package delivery companies and postal service organizations face the problem of designing a transportation network in order to service their ...
Hans-Jürgen Sebastian, Tore Grünert, Mic...
CEC
2003
IEEE
15 years 10 months ago
A modified ant colony algorithm for evolutionary design of digital circuits
Evolutionary computation presents a new paradigm shift in hardware design and synthesis. According to this paradigm, hardware design is pursued by deriving inspiration from biologi...
Mostafa Abd-El-Barr, Sadiq M. Sait, Bambang A. B. ...