A central problem in extending the von Neumann architecture to petaflop computers with millions of hardware threads and with a shared memory is defining the memory model [Lam79,...
This paper studies realization and performance comparison of the sequential and weak consistency models in the network-on-chip (NoC) based distributed shared memory (DSM) multi-cor...
Abdul Naeem, Xiaowen Chen, Zhonghai Lu, Axel Jants...
We develop a rigorous semantics for Power and ARM multiprocessor programs, including their relaxed memory model and the behaviour of reasonable fragments of their instruction sets...
Jade Alglave, Anthony C. J. Fox, Samin Ishtiaq, Ma...
Conventional relaxed memory ordering techniques follow a proactive model: at a synchronization point, a processor makes its own updates to memory available to other processors by ...
Christoph von Praun, Harold W. Cain, Jong-Deok Cho...
Distributed stream query services must simultaneously process a large number of complex, continuous queries with stringent performance requirements while utilizing distributed pro...
Sangeetha Seshadri, Bhuvan Bamba, Brian F. Cooper,...