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ICCAD
2000
IEEE
100views Hardware» more  ICCAD 2000»
15 years 8 months ago
Partial Simulation-Driven ATPG for Detection and Diagnosis of Faults in Analog Circuits
In this paper, we propose a novel fault-oriented test generation methodology for detection and isolation of faults in analog circuits. Given the description of the circuit-underte...
Sudip Chakrabarti, Abhijit Chatterjee
143
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WSC
2008
15 years 6 months ago
Architecture for modeling, simulation, and execution of PLC based manufacturing system
In this paper, we propose an integrated architecture for modeling, simulation, and execution of PLC (Programmable Logic Controller) based manufacturing system. The main objective ...
Devinder Thapa, Chang Mok Park, Kwan Hee Han, Sang...
ICFP
2005
ACM
16 years 3 months ago
Scrap your nameplate: (functional pearl)
Recent research has shown how boilerplate code, or repetitive code for traversing datatypes, can be eliminated using generic programming techniques already available within some i...
James Cheney
137
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FASE
2005
Springer
15 years 9 months ago
Checking Memory Safety with Blast
Abstract. Blast is an automatic verification tool for checking temporal safety properties of C programs. Given a C program and a temporal safety property, Blast statically proves ...
Dirk Beyer, Thomas A. Henzinger, Ranjit Jhala, Rup...
MICRO
2002
IEEE
159views Hardware» more  MICRO 2002»
15 years 8 months ago
Master/slave speculative parallelization
Master/Slave Speculative Parallelization (MSSP) is an execution paradigm for improving the execution rate of sequential programs by parallelizing them speculatively for execution ...
Craig B. Zilles, Gurindar S. Sohi