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ISCA
1995
IEEE
120views Hardware» more  ISCA 1995»
15 years 10 months ago
Streamlining Data Cache Access with Fast Address Calculation
For many programs, especially integer codes, untolerated load instruction latencies account for a significant portion of total execution time. In this paper, we present the desig...
Todd M. Austin, Dionisios N. Pnevmatikatos, Gurind...
191
Voted
DAC
2006
ACM
15 years 8 months ago
Systematic software-based self-test for pipelined processors
Software-based self-test (SBST) has recently emerged as an effective methodology for the manufacturing test of processors and other components in systems-on-chip (SoCs). By moving ...
Mihalis Psarakis, Dimitris Gizopoulos, Miltiadis H...
WOTUG
2008
15 years 8 months ago
Representation and Implementation of CSP and VCR Traces
Abstract. Communicating Sequential Processes (CSP) was developed around a formal algebra of processes and a semantics based on traces (and failures and divergences). A trace is a r...
Neil C. C. Brown, Marc L. Smith
BMCBI
2007
116views more  BMCBI 2007»
15 years 6 months ago
primetv: a viewer for reconciled trees
Background: Evolutionary processes, such as gene family evolution or parasite-host cospeciation, can often be viewed as a tree evolving inside another tree. Relating two given tre...
Bengt Sennblad, Eva Schreil, Ann-Charlotte Berglun...
BMCBI
2007
152views more  BMCBI 2007»
15 years 6 months ago
Recodon: Coalescent simulation of coding DNA sequences with recombination, migration and demography
Background: Coalescent simulations have proven very useful in many population genetics studies. In order to arrive to meaningful conclusions, it is important that these simulation...
Miguel Arenas, David Posada