494 search results - page 26 / 99 » Generic Design Space Exploration for Reconfigurable Architec... |
78
Voted
HPCA
2006
IEEE
15 years 10 months ago
2006
IEEE
This paper explores the multi-dimensional design space for chip multiprocessors, exploring the inter-related variables of core count, pipeline depth, superscalar width, L2 cache s...
82
Voted
DAC
2006
ACM
15 years 10 months ago
2006
ACM
Pareto surfaces in the performance space determine the range of feasible performance values for a circuit topology in a given technology. We present a non-dominated sorting based ...
HPCA
2005
IEEE
15 years 3 months ago
2005
IEEE
As microprocessors become increasingly interconnected, the power consumed by the interconnection network can no longer be ignored. Moreover, with demand for link bandwidth increas...
VLSID
2004
IEEE
15 years 10 months ago
2004
IEEE
Recent research for testable designs has focussed on inserting test structures by re-arranging an Register-TransferLevel (RTL) data path generated from a behavioural description t...
EUROPAR
2006
Springer
15 years 1 months ago
2006
Springer
Abstract. Programming multimedia applications for System-on-Chip (SoC) architectures is difficult because streaming communication, user event handling, reconfiguration, and paralle...