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77
Voted
VLSID
2005
IEEE
102views VLSI» more  VLSID 2005»
15 years 10 months ago
Integrated On-Chip Storage Evaluation in ASIP Synthesis
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar
100
Voted
DAC
2008
ACM
15 years 10 months ago
Specify-explore-refine (SER): from specification to implementation
Driven by increasing complexity and reliability demands, the Japanese Aerospace Exploration Agency (JAXA) in 2004 commissioned development of ELEGANT, a complete SpecC-based envir...
Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Dani...
73
Voted
UIST
1997
ACM
15 years 1 months ago
The MetaDESK: Models and Prototypes for Tangible User Interfaces
The metaDESK is a user interface platform demonstrating new interaction techniques we call “tangible user interfaces.” We explore the physical instantiation of interface eleme...
Brygg Ullmer, Hiroshi Ishii
86
Voted
MASCOTS
2010
14 years 11 months ago
Barra: A Parallel Functional Simulator for GPGPU
Abstract--We present Barra, a simulator of Graphics Processing Units (GPU) tuned for general purpose processing (GPGPU). It is based on the UNISIM framework and it simulates the na...
Sylvain Collange, Marc Daumas, David Defour, David...
DAC
2010
ACM
14 years 10 months ago
Automatic multithreaded pipeline synthesis from transactional datapath specifications
We present a technique to automatically synthesize a multithreaded in-order pipeline from a high-level unpipelined datapath specification. This work extends the previously propose...
Eriko Nurvitadhi, James C. Hoe, Shih-Lien Lu, Timo...