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ASE
2005
137views more  ASE 2005»
14 years 11 months ago
Rewriting-Based Techniques for Runtime Verification
Techniques for efficiently evaluating future time Linear Temporal Logic (abbreviated LTL) formulae on finite execution traces are presented. While the standard models of LTL are i...
Grigore Rosu, Klaus Havelund
ESOP
2004
Springer
15 years 5 months ago
Extracting a Data Flow Analyser in Constructive Logic
Abstract. We show how to formalise a constraint-based data flow analysis in the specification language of the Coq proof assistant. This involves defining a dependent type of lat...
David Cachera, Thomas P. Jensen, David Pichardie, ...
DKE
1999
87views more  DKE 1999»
14 years 11 months ago
Logical Foundations of Multilevel Databases
In this paper, we propose a formal model for multilevel databases. This model aims at being a generic model, that is it can be interpreted for any kind of database (relational, ob...
Frédéric Cuppens, Alban Gabillon
ICCAD
2007
IEEE
116views Hardware» more  ICCAD 2007»
15 years 8 months ago
Device and architecture concurrent optimization for FPGA transient soft error rate
Late CMOS scaling reduces device reliability, and existing work has studied the permanent SER (soft error rate) for configuration memory in FPGA extensively. In this paper, we sh...
Yan Lin, Lei He
IAT
2006
IEEE
15 years 5 months ago
Specification and Verification of Dynamics in Cognitive Agent Models
Within many domains, among which biological and cognitive areas, multiple interacting processes occur among agents with dynamics that are hard to handle. Current approaches to ana...
Tibor Bosse, Catholijn M. Jonker, Lourens van der ...