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ICCAD
2010
IEEE
148views Hardware» more  ICCAD 2010»
14 years 7 months ago
Trace signal selection to enhance timing and logic visibility in post-silicon validation
Trace buffer technology allows tracking the values of a few number of state elements inside a chip within a desired time window, which is used to analyze logic errors during post-s...
Hamid Shojaei, Azadeh Davoodi
LATIN
2004
Springer
15 years 2 months ago
Pure Future Local Temporal Logics Are Expressively Complete for Mazurkiewicz Traces
The paper settles a long standing problem for Mazurkiewicz traces: the pure future local temporal logic defined with the basic modalities exists-next and until is expressively com...
Volker Diekert, Paul Gastin
DAC
2003
ACM
15 years 10 months ago
Automatic trace analysis for logic of constraints
Verification of system designs continues to be a major challenge today. Simulation remains the primary tool for making sure that implementations perform as they should. We present...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...
ENTCS
2007
69views more  ENTCS 2007»
14 years 9 months ago
Modal Logic Characterization of Markovian Testing and Trace Equivalences
Markovian testing and trace equivalences have been recently proposed as reasonable alternatives to Markovian bisimilarity, as both of them induce at the Markov chain level an aggr...
Marco Bernardo, Stefania Botta
95
Voted
ENTCS
2007
120views more  ENTCS 2007»
14 years 9 months ago
A Framework for Interpreting Traces of Functional Logic Computations
This paper is part of a comprehensive approach to debugging for functional logic languages. The basic idea of the whole project is to trace the execution of functional logic progr...
Bernd Braßel