This paper shows that the minimum ratio canceling algorithm of Wallacher (1989) (and a faster relaxed version) can be generalized to an algorithm for general linear programs with ...
The choice of an appropriate hardware representation model is key to successful evolution of digital circuits. One of the most popular models is cartesian genetic programming, whi...
A high-level built-in self-test (BIST) synthesis involves several tasks such as system register assignment, interconnection assignment, and BIST register assignment. Existing high...
In this paper, we propose an efficient algorithm to reduce the voltage noises for on-chip power/ground (P/G) networks of VLSI. The new method is based on the sequence of linear p...
In this paper, we present an optimal algorithm for solving the simultaneous technology mapping and linear placement problem for tree-structured circuits with the objective of mini...