305 search results - page 23 / 61 » Geometric programming for circuit optimization |
FPGA
1997
ACM
15 years 3 months ago
1997
ACM
We present a general approach to the FPGA technology mapping problem that applies to any logic block composed of lookup tables LUTs and can yield optimal solutions. The connecti...
108
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TVLSI
2008
14 years 11 months ago
2008
Abstract--Technology scaling in the nanometer era has increased the transistor's susceptibility to process variations. The effects of such variations are having a huge impact ...
ICCAD
2003
IEEE
15 years 5 months ago
2003
IEEE
This paper presents several important enhancements to the recently published multilevel placement package mPL [12]. The improvements include (i) unconstrained quadratic relaxation...
VLSID
1999
IEEE
15 years 4 months ago
1999
IEEE
A new approach for CMOS op-amp circuit synthesis has proposed here. The approach is based on the observation that the rst order behavior of a MOS transistor in the saturation regi...
118
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GLVLSI
2003
IEEE
15 years 5 months ago
2003
IEEE
One of the fundamental problems in Deep Sub Micron (DSM) circuits is Simultaneous Switching Noise (SSN), which causes voltage fluctuations in the circuit power/ground networks. In...