Dynamic power is the main source of power consumption in CMOS circuits. It depends on the square of the supply voltage. It may significantly be reduced by scaling down the supply ...
Noureddine Chabini, El Mostapha Aboulhamid, Yvon S...
Abstract--In sub-100 nm CMOS processes, delay and leakage power reduction continue to be among the most critical design concerns. We propose to exploit the recent availability of f...
Kwangok Jeong, Andrew B. Kahng, Chul-Hong Park, Ha...
As semiconductor processing technology continues to scale down, managing reliability becomes an increasingly difficult challenge in high-performance microprocessor design. Transie...
We describe an optimization strategy for minimizing total power consumption using dual threshold voltage (Vth) technology. Significant power savings are possible by simultaneous a...
David Nguyen, Abhijit Davare, Michael Orshansky, D...
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...
Foad Dabiri, Ani Nahapetian, Miodrag Potkonjak, Ma...