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» Geometric programming for circuit optimization
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DATE
2003
IEEE
109views Hardware» more  DATE 2003»
15 years 2 months ago
A Novel Metric for Interconnect Architecture Performance
We propose a new metric for evaluation of interconnect architectures. This metric is computed by optimal assignment of wires from a given wire length distribution (WLD) to a given...
Parthasarathi Dasgupta, Andrew B. Kahng, Swamy Mud...
GLOBECOM
2008
IEEE
14 years 9 months ago
Energy Efficient Estimation of Gaussian Sources over Inhomogeneous Gaussian MAC Channels
In this paper, we first provide a joint source and channel coding (JSCC) approach in estimating Gaussian sources over Gaussian MAC channels, as well as its sufficient and necessary...
Shuangqing Wei, Rajgopal Kannan, S. Sitharama Iyen...
88
Voted
FGCS
2007
107views more  FGCS 2007»
14 years 9 months ago
Algorithmic re-structuring and data replication for protein structure comparison on a GRID
This paper describes a major restructuring of PROuST, a method for protein structure comparison, for an efficient porting to the Grid. PROuST consists of different components: an...
Giovanni Ciriello, M. Comin, Concettina Guerra
DAC
2008
ACM
15 years 10 months ago
A progressive-ILP based routing algorithm for cross-referencing biochips
Due to recent advances in microfluidics technology, digital microfluidic biochips and their associated CAD problems have gained much attention, most of which has been devoted to d...
Ping-Hung Yuh, Sachin S. Sapatnekar, Chia-Lin Yang...
DAC
2007
ACM
15 years 10 months ago
Chip Multi-Processor Generator
The drive for low-power, high performance computation coupled with the extremely high design costs for ASIC designs, has driven a number of designers to try to create a flexible, ...
Alex Solomatnikov, Amin Firoozshahian, Wajahat Qad...