241 search results - page 42 / 49 » Geometry of synthesis: a structured approach to VLSI design |
124
click to vote
WEA
2007
Springer
15 years 8 months ago
2007
Springer
For trunk packing problems only few approximation schemes are known, mostly designed for the European standard DIN 70020 [6] with equally sized boxes [8, 9, 11, 12]. In this paper ...
CORR
2008
Springer
15 years 2 months ago
2008
Springer
In this work, we describe a simple 1-mask sacrificial layer process that allows us to prototype a tuneable capacitor. The process is specially optimized to procure a dual picks pr...
124
click to vote
VLSID
2003
IEEE
16 years 2 months ago
2003
IEEE
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...
100
click to vote
FCCM
2007
IEEE
15 years 8 months ago
2007
IEEE
We present a domain-specific approach to generate highperformance hardware-software partitioned implementations of the discrete Fourier transform (DFT) in fixed point precision....
DATE
2006
IEEE
15 years 8 months ago
2006
IEEE
Power distribution and signal transmission are becoming key limiters for chip performance in nanometer era. These issues can be simultaneously addressed by designing transmission ...