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» Geometry of synthesis: a structured approach to VLSI design
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ENDM
2000
174views more  ENDM 2000»
14 years 9 months ago
Hybrid Constraints in Automated Model Synthesis and Model Processing
Both parametric design tasks and analysis tasks of technical systems have a similar problem setting: The structure of the system to be configured or analyzed is defined already. W...
Klaus-Ulrich Leweling, Benno Stein
79
Voted
ISVLSI
2007
IEEE
107views VLSI» more  ISVLSI 2007»
15 years 3 months ago
A Hash-based Approach for Functional Regularity Extraction During Logic Synthesis
Performance, power, and functionality, yield and manufacturability are rapidly becoming additional critical factors that must be considered at higher levels of ion. A possible sol...
Angelo P. E. Rosiello, Fabrizio Ferrandi, Davide P...
84
Voted
FCCM
2000
IEEE
144views VLSI» more  FCCM 2000»
15 years 1 months ago
Automatic Synthesis of Data Storage and Control Structures for FPGA-Based Computing Engines
Mapping computations written in high-level programming languages to FPGA-based computing engines requires programmers to generate the datapath responsible for the core of the comp...
Pedro C. Diniz, Joonseok Park
111
Voted
ISPD
2005
ACM
188views Hardware» more  ISPD 2005»
15 years 3 months ago
A semi-persistent clustering technique for VLSI circuit placement
Placement is a critical component of today's physical synthesis flow with tremendous impact on the final performance of VLSI designs. However, it accounts for a significant p...
Charles J. Alpert, Andrew B. Kahng, Gi-Joon Nam, S...
GLVLSI
2008
IEEE
117views VLSI» more  GLVLSI 2008»
15 years 4 months ago
Delay driven AIG restructuring using slack budget management
Timing optimizations during logic synthesis has become a necessary step to achieve timing closure in VLSI designs. This often involves “shortening” all paths found in the circ...
Andrew C. Ling, Jianwen Zhu, Stephen Dean Brown