Clock selection has a significant impact on the performance and quality of designs in high-level synthesis. In most synthesis systems, a convenient value of the clock is chosen or...
J. Ramanujam, Sandeep Deshpande, Jinpyo Hong, Mahm...
This paper presents a systematic high-speed VLSI implementation of the discrete wavelet transform (DWT) based on hardware-efficient parallel FIR filter structures. High-speed 2-D D...
This tutorial present the key aspects of design challenges and its solutions that are being experienced in VLSI design in the era of nano technology. The focus will be on design c...
This paper describes the features and design methodology of MIDA, a MPEG1 integrated audio decoder. MIDA has been almost completely designed using automatic synthesis of VHDL desc...
Abstract -- Telecommunication network management applications often require application-specific ICs that use large dynamically allocated stored data structures. Currently availab...
Gjalt G. de Jong, Bill Lin, Carl Verdonck, Sven Wu...