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» Geometry of synthesis: a structured approach to VLSI design
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VLSID
2002
IEEE
105views VLSI» more  VLSID 2002»
15 years 10 months ago
A Heuristic for Clock Selection in High-Level Synthesis
Clock selection has a significant impact on the performance and quality of designs in high-level synthesis. In most synthesis systems, a convenient value of the clock is chosen or...
J. Ramanujam, Sandeep Deshpande, Jinpyo Hong, Mahm...
TSP
2008
158views more  TSP 2008»
14 years 9 months ago
High-Speed VLSI Implementation of 2-D Discrete Wavelet Transform
This paper presents a systematic high-speed VLSI implementation of the discrete wavelet transform (DWT) based on hardware-efficient parallel FIR filter structures. High-speed 2-D D...
Chao Cheng, Keshab K. Parhi
VLSID
2006
IEEE
183views VLSI» more  VLSID 2006»
15 years 3 months ago
Design Challenges for High Performance Nano-Technology
This tutorial present the key aspects of design challenges and its solutions that are being experienced in VLSI design in the era of nano technology. The focus will be on design c...
Goutam Debnath, Paul J. Thadikaran
EURODAC
1995
IEEE
159views VHDL» more  EURODAC 1995»
15 years 1 months ago
The VHDL based design of the MIDA MPEG1 audio decoder
This paper describes the features and design methodology of MIDA, a MPEG1 integrated audio decoder. MIDA has been almost completely designed using automatic synthesis of VHDL desc...
Andrea Finotello, Maurizio Paolini
ICCAD
1995
IEEE
144views Hardware» more  ICCAD 1995»
15 years 1 months ago
Background memory management for dynamic data structure intensive processing systems
Abstract -- Telecommunication network management applications often require application-specific ICs that use large dynamically allocated stored data structures. Currently availab...
Gjalt G. de Jong, Bill Lin, Carl Verdonck, Sven Wu...