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DATE
2009
IEEE
90views Hardware» more  DATE 2009»
15 years 6 months ago
Property analysis and design understanding
—Verification is a major issue in circuit and system design. Formal methods like bounded model checking (BMC) can guarantee a high quality of the verification. There are severa...
Ulrich Kühne, Daniel Große, Rolf Drechs...
SPIN
2000
Springer
15 years 3 months ago
Modeling the ASCB-D Synchronization Algorithm with SPIN: A Case Study
In this paper, we describe our application of SPIN 1 to model an algorithm used to synchronize the clocks of modules that provide periodic real-time communication over a network. W...
Nicholas Weininger, Darren D. Cofer
DLT
2009
14 years 9 months ago
Branching-Time Temporal Logics with Minimal Model Quantifiers
Abstract. Temporal logics are a well investigated formalism for the specification and verification of reactive systems. Using formal verification techniques, we can ensure the corr...
Fabio Mogavero, Aniello Murano
WOSP
2005
ACM
15 years 5 months ago
A model transformation framework for the automated building of performance models from UML models
In order to effectively validate the performance of software systems throughout their development cycle it is necessary to continuously build performance models from software mod...
Andrea D'Ambrogio
SELMAS
2004
Springer
15 years 5 months ago
CAMLE: A Caste-Centric Agent-Oriented Modelling Language and Environment
Abstract. This paper presents an agent-oriented modelling language and environment CAMLE. It is based on the conceptual model of multi-agent systems (MAS) proposed and formally def...
Lijun Shan, Hong Zhu