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» Global delay optimization using structural choices
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ICCAD
2006
IEEE
99views Hardware» more  ICCAD 2006»
15 years 8 months ago
Information theoretic approach to address delay and reliability in long on-chip interconnects
With shrinking feature size and growing integration density in the Deep Sub-Micron technologies, the global buses are fast becoming the “weakest-links” in VLSI design. They ha...
Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra
SPAA
2005
ACM
15 years 5 months ago
Randomization does not reduce the average delay in parallel packet switches
Switching cells in parallel is a common approach to build switches with very high external line rate and a large number of ports. A prime example is the parallel packet switch (in...
Hagit Attiya, David Hay
ISPD
2004
ACM
150views Hardware» more  ISPD 2004»
15 years 5 months ago
Topology optimization of structured power/ground networks
This paper presents an efficient method for optimizing the design of power/ground (P/G) networks by using locally regular, globally irregular grids. The procedure divides the pow...
Jaskirat Singh, Sachin S. Sapatnekar
113
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CEC
2007
IEEE
14 years 12 months ago
Designing memetic algorithms for real-world applications using self-imposed constraints
— Memetic algorithms (MAs) combine the global exploration abilities of evolutionary algorithms with a local search to further improve the solutions. While a neighborhood can be e...
Thomas Michelitsch, Tobias Wagner, Dirk Biermann, ...
INFOCOM
2010
IEEE
14 years 10 months ago
Distributed Opportunistic Scheduling for Ad-Hoc Communications Under Delay Constraints
—With the convergence of multimedia applications and wireless communications, there is an urgent need for developing new scheduling algorithms to support real-time traffic with ...
Sheu-Sheu Tan, Dong Zheng, Junshan Zhang, James R....