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» Global delay optimization using structural choices
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ICCAD
1997
IEEE
90views Hardware» more  ICCAD 1997»
15 years 7 months ago
A hierarchical decomposition methodology for multistage clock circuits
† This paper describes a novel methodology to automate the design of the interconnect distribution for multistage clock circuits. We introduce two key ideas. First, a hierarchica...
Gary Ellis, Lawrence T. Pileggi, Rob A. Rutenbar
152
Voted
ENTCS
2007
190views more  ENTCS 2007»
15 years 2 months ago
Modelling Multicast QoS Routing by using Best-Tree Search in And-or Graphs and Soft Constraint Logic Programming
We suggest a formal model to represent and solve the multicast routing problem in multicast networks. To attain this, we model the network adapting it to a weighted and-or graph, ...
Stefano Bistarelli, Ugo Montanari, Francesca Rossi...
ISPD
2004
ACM
134views Hardware» more  ISPD 2004»
15 years 8 months ago
Performance-driven register insertion in placement
As the CMOS technology is scaled into the dimension of nanometer, the clock frequencies and die sizes of ICs are shown to be increasing steadily [5]. Today, global wires that requ...
Dennis K. Y. Tong, Evangeline F. Y. Young
INFOCOM
2002
IEEE
15 years 8 months ago
Efficient Dissemination of Personalized Information Using Content-Based Multicast
There has been a surge of interest in the delivery of personalized information to users (e.g. personalized stocks or travel information), particularly as mobile users with limited ...
Rahul Shah, Ravi Jain, Farooq Anjum
CORR
2008
Springer
116views Education» more  CORR 2008»
15 years 3 months ago
To which extend is the "neural code" a metric ?
Here is proposed a review of the different choices to structure spike trains, using deterministic metrics. Temporal constraints observed in biological or computational spike train...
Bruno Cessac, Horacio Rostro-González, Juan...