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» Global delay optimization using structural choices
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ICPP
1999
IEEE
15 years 7 months ago
Improving Performance of Load-Store Sequences for Transaction Processing Workloads on Multiprocessors
On-line transaction processing exhibits poor memory behavior in high-end multiprocessor servers because of complex sharing patterns and substantial interaction between the databas...
Jim Nilsson, Fredrik Dahlgren
ICDAR
2009
IEEE
15 years 29 days ago
Towards Handwritten Mathematical Expression Recognition
In this paper, we propose a new framework for online handwritten mathematical expression recognition. The proposed architecture aims at handling mathematical expression recognitio...
Ahmad-Montaser Awal, Harold Mouchère, Chris...
ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
16 years 3 days ago
Flip-flop insertion with shifted-phase clocks for FPGA power reduction
— Although the LUT (look-up table) size of FPGAs has been optimized for general applications, complicated designs may contain a large number of cascaded LUTs between flip-flops...
Hyeonmin Lim, Kyungsoo Lee, Youngjin Cho, Naehyuck...
SOCA
2010
IEEE
15 years 1 months ago
Weighted fair share scheduling for loosely controlled concurrent event systems
In asynchronous event systems, the production of an event is decoupled from its consumption via an event queue. The loose coupling of such systems allows great flexibility as to ...
Sean Rooney, Luis Garcés-Erice, Kristijan D...
GRAPHICSINTERFACE
2011
14 years 6 months ago
Edge-constrained image compositing
The classic task of image compositing is complicated by the fact that the source and target images need to be carefully aligned and adjusted. Otherwise, it is not possible to achi...
Martin Eisemann, Daniel Gohlke, Marcus A. Magnor